Gap count analysis for a high speed serialized bus

ABSTRACT

A method of optimizing communication over a high-speed serial bus by minimizing the delay between packets transmitted over the bus is disclosed. The method comprises: calculating the round trip delay between PHYs connected on the bus by pinging; a bus manager sending a configuration packet to all PHYs connected on the bus, the configuration packet containing a minimum gap_count parameter value; and all PHYs connected on the bus sending packets over the bus using the minimum gap_count parameter value as a delay between packets.

FIELD OF THE INVENTION

The present invention relates broadly to serial bus performance.Specifically, the present invention relates to improving bus performanceby calculating the optimal gap_count parameter for a given topologyutilizing a high-speed serial bus to connect devices.

BACKGROUND OF THE INVENTION

The Institute of Electrical and Electronic Engineers (IEEE) haspromulgated a number of versions of a high-speed serial bus protocolfalling under the IEEE 1394 family of standards (referred to hereincollectively as “1394”). A typical serial bus having a1394 architectureinterconnects multiple node devices via point-to-point links, such ascables, each connecting a single node on the serial bus to another nodeon the serial bus. Data packets are propagated throughout the serial bususing a number of point-to-point transactions, such that a node thatreceives a packet from another node via a first point-to-point linkretransmits the received packet via other point-to-point links. A treenetwork configuration and associated packet handling protocol ensuresthat each node receives every packet once. The 1394-compliant serial busmay be used as an alternate bus for the parallel backplane of a computersystem, as a low cost peripheral bus, or as a bus bridge betweenarchitecturally compatible buses. Bus performance is gauged bythroughput, or the amount of data that can be transmitted over the busduring a period of time.

There are several ways to improve bus performance. Devices connected tothe bus can be arranged to minimize the longest round-trip delay betweenany two leaf nodes. This may involve either minimizing the number ofcable connections between the farthest devices, reducing cable lengths,or both. Another way to improve bus performance is to group devices withidentical speed capabilities next to one another. This avoids thecreation of a “speed trap” when a slower device lies along the pathbetween the two faster devices. Finally, bus performance can be improvedby setting the PHY gap count parameter to the lowest workable value fora particular topology. However, determining this lowest workable valueis problematic in that all of the variables affecting this value areunknown. Gap count parameters have been configured in the past using asubset of all possible variables, and the result is that the gap countis not optimal.

SUMMARY OF THE INVENTION

The present invention provides an optimal gap count that allows ahigh-speed serial bus to run faster and thus realize superiorperformance over prior buses. In an embodiment, bus management softwaresends a special PHY configuration packet that is recognized by all PHYson the bus. The configuration packet contains a gap count value that allPHYs on the bus can use. As this gap count value decreases the timeinterval between packets that are transmitted, more real data can betransmitted over the bus per unit of time.

In an embodiment, the bus manager pings a PHY. The PHY sends a responseto the ping, and a flight time value of the response from the PHY to thebus manager is added to calculate a round trip delay value. The pingcommand runs at the link layer level, from the link layer of one node tothe link layer of another node. All flight time between link layer andPHY is ignored, and just the flight time from one PHY to another PHY iscalculated. The ping time measured shows the link-to-link delay. Thedelay between the bus and the link is specified in the bus standard withminimum and maximum values. The PHY and link layer of a node is designedto be within that range specified by the standard. The round trip delaybetween nodes can be calculated as:

${{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}}\underset{\_}{<}\begin{matrix}{\begin{pmatrix}{{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{X}}\rbrack}} + {\sum\limits_{n}^{({{BM},X})}\;{2 \cdot {Jitter}_{n}}} +} \\{{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}} +} \\{{PHY\_ DELAY}_{N,\max}^{P_{N}^{\prime}->P_{N}} + {{ARB\_ RESPONSE}{\_ DELAY}_{N,\max}^{P_{N}->P_{N}^{\prime}}}}\end{pmatrix} -} \\\begin{pmatrix}{{{2 \cdot {Round\_ Trip}}{\_ Delay}_{{Ping},\min}^{\lbrack{P_{BM}O\; P_{N}}\rbrack}} + {4 \cdot {Jitter}_{N}} +} \\{{PHY\_ DELAY}_{N,\min}^{P_{N}^{BM}->P_{N}^{\prime}} + {{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}^{\prime}->P_{N}^{BM}}} +} \\{{PHY\_ DELAY}_{N,\min}^{P_{N}^{BM}->P_{N}} + {{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}->P_{N}^{BM}}}}\end{pmatrix}\end{matrix}$

This value can be communicated as the gap count parameter contained inthe configuration packet, thus setting the gap between packets to anoptimal value and increasing bus performance.

Many other features and advantages of the present application willbecome apparent from the following detailed description considered inconjunction with the accompanying drawings, in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an intervening path model between two nodes, X & Y,and denotes the reference points required for a full analysis;

FIG. 2 illustrates ack/iso gap preservation, in the case where PHY Xoriginated the most recent packet and PHY Y is responding (either withan ack or the next isochronous arbitration/packet).

FIG. 3 illustrates the sequence PHY Y will follow in responding to areceived packet.

FIG. 4 illustrates subaction gap preservation, in the case where PHY Xoriginated the most recent packet and PHY Y is responding after asubaction gap with arbitration for the current fairness interval.

FIG. 5 illustrates consistent subaction gap detection, in the case wherePHY X originates an isochronous packet, observes a subaction_gap, andbegins to drive an arbitration indication.

FIG. 6 illustrates an internal gap detection sequence, by showing thetiming reference for relating the external gap detection times to theinternal gap detection times.

FIG. 7 illustrates consistent arbitration reset gap detection, in thecase where PHY X originates an asynchronous packet, observes anarbitration reset gap, and begins to drive an arbitration indication.

FIG. 8 illustrates a ping subaction issued by the link in Node X anddirected to Node Y.

FIG. 9 illustrates a Bus Manager Leaf to Leaf topology.

FIG. 10 illustrates a topology where the bus manager is not a leaf butis part of the connecting path between the two leaves.

FIG. 11 illustrates a topology where the bus manager is not a leaf butis not part of the connecting path between the two leaves.

DETAILED DESCRIPTION

Four well known limiting corner cases for gap count are examined in aneffort to find the minimum allowable gap count for a given topology.Both the table method and pinging method of determining the optimal gapcount are explored.

It is important to note that this analysis assumes that PHY_DELAY cannever exceed the maximum published in the PHY register set. However,corner conditions have been identified in which it is theoreticallypossible to have PHY_DELAY temporarily exceed the maximum publisheddelay when repeating minimally spaced packets. Although not a rigorousproof, this phenomena is ignored for this analysis on the basis that itis presumed to be statistically insignificant.

The path between any two given PHYs can be represented as a daisy chainconnection of the two devices with zero or more intervening, orrepeating, PHYs. FIG. 1 illustrates such a path between two nodes, X &Y, and denotes the reference points required for a full analysis.

TABLE 1 Variable Definitions ARB_RE- Delay in propagating arbitrationindication SPONSE_DE- received from port P_(n) of PHY n to port LAY_(n)^(P) ^(n) ^(→P′) ^(n) P′_(n) of PHY n. BASERATE_(n) Fundamentaloperating frequency of PHY n. cable_delay_(n) One-way flight time ofarbitration and data signals through cable_(n). The flight-time isassumed to be constant from one transmission to the next and symmetric.DATA_END_TIME_(n) ^(P) ^(n) Length of DATA_END transmitted on port P_(n)of PHY n. PHY_DELAY_(n) ^(P′) ^(n) ^(→P) ^(n) Time from receipt of firstdata bit at port P′_(n) of PHY n to re-transmission of same bit at portP_(n) of PHY n. RESPONSE_TIME P_(n) ^(P′) ^(n) Idle time at port P′_(n)of PHY n between the reception of a inbound packet and the associatedoutbound arbitration indication for the subsequent packet intended tooccur within the same isochronous interval or asynchronous subaction.

For any given topology, the gap count must be set such that an iso orack gap observed/generated at one PHY isn't falsely interpreted as asubaction gap by another PHY in the network. Ack/Iso gaps are known tobe at their largest nearest the PHY that originated the last packet. Toensure that the most recent originating PHY doesn't interrupt asubaction or isochronous interval with asynchronous arbitration, itssubaction_gap timeout must be greater than the largest IDLE which canlegally occur within a subaction or isochronous interval. FIG. 2illustrates the case in which PHY X originated the most recent packetand PHY Y is responding (either with an ack or the next isochronousarbitration/packet).

For all topologies, the idle time observed at point Px must not exceedthe subaction gap detection time:

$\begin{matrix}{{Idle}_{\max}^{P_{X}} < {subaction\_ gap}_{\min}^{P_{X}}} & (1)\end{matrix}$

The idle time at point Px can be determined by examining the sequence oftime events in the network. All timing events are referenced to theexternal bus (as opposed to some internal point in the PHY).

t₀ First bit of packet sent at point P_(X) t₁ Last bit of packet sent atpoint P_(x), DATA_END begins. t₁ follows t₀ by the length of the packettimed in PHY X's clock domain. t₂ DATA_END concludes at point P_(X),IDLE begins. t₂ follows t₁ by DATA_END_TIME_(X) ^(P) ^(X) t₃ First bitof packet received at point P′_(Y). t₃ follows t_(O) by all interveningcable_delay and PHY_DELAY instances. t₄ Last bit of packet received atpoint P′_(Y). t₄ follows t₃ by the length of the packet timed in PHYY-1's clock domain. t₅ DATA_END concludes at point P′_(Y), gap begins.t₅ follows t₄ by DATA_END_TIME_(Y−1) ^(P) ^(Y−1) t₆ PHY Y responds withack packet, isoch packet, or isoch arbitration within RESPONSE_TIME_(Y)^(P) ^(Y) following t₅ t₇ Arbitration indication arrives at point P_(X).t₇ follows t₆ by the all intervening cable_delay and ARB_RESPONSE_DELAYinstances.

$\quad\begin{matrix}{\quad\begin{matrix}{t_{1} = {t_{0} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{X}}}} & (2) \\{t_{2} = {{t_{1} + {{DATA\_ END}{\_ TIME}_{X}^{P_{X}}}} = {t_{0} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{X}} + {{DATA\_ END}{\_ TIME}_{X}^{Px}}}}} & (3) \\{t_{3} = {t_{0} + {cable\_ delay}_{x} + {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}} \right.}}} & (4) \\{t_{4} = {{t_{3} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y - 1}}} = {t_{0} + {cable\_ delay}_{X} + {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}} \right)} + \frac{packet\_ lenght}{{packet\_ speed} \cdot {BASERATE}_{Y - 1}}}}} & (5) \\{t_{5} = {{t_{4} + {{DATA\_ END}{\_ TIME}_{Y - 1}^{P_{y - 1}}}} = {t_{0} + {cable\_ delay}_{X} + {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}} \right)} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y - 1}} + {{DATA\_ END}{\_ TIME}_{Y - 1}^{P_{y - 1}}}}}} & (6) \\{t_{6} = {{t_{5} + {RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}}} = {t_{0} + {cable\_ delay}_{X} + {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}} \right)} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y - 1}} + {{DATA\_ END}{\_ TIME}_{Y - 1}^{P_{y - 1}}} + {RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}}}}} & (7)\end{matrix}} & \; \\{t_{7} = {{t_{6} + {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}}} \right)} + {cable\_ delay}_{X}} = {{t_{0}{\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}} + {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}}} \right)}} + {2 \cdot {cable\_ delay}_{X}} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y - 1}} + {{DATA\_ END}{\_ TIME}_{Y - 1}^{P_{y - 1}}} + {RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}}}}} & (8)\end{matrix}$Given t₀ through t₇ above, the Idle time seen at point P_(x) is givenas:

$\quad\begin{matrix}{{Idle}^{P_{x}} = {{t_{7} - t_{2}} = {{\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}} + {{ARB\_ RESPONSE}\_{DELAY}_{n}^{P_{n}\rightarrow{P^{\prime}}_{n}}}} \right)} + {2 \cdot {cable\_ delay}_{X}} + {RESPONSE\_ TIME}_{y}^{P_{Y}^{\prime}} + {{DATA\_ END}{\_ TIME}_{Y - 1}^{P_{y - 1}}} - {{DATA\_ END}{\_ TIME}_{X}^{P_{x}}} + {\frac{packet\_ length}{packet\_ speed} \cdot \left( {\frac{1}{{BASERATE}_{Y - 1}} - \frac{1}{{BASERATE}_{X}}} \right)}}}} & (9) \\{{Let}\text{:}} & \; \\{{DE\_ delta}^{\lbrack{P_{y - 1},P_{x}}\rbrack} = {{{DATA\_ END}{\_ TIME}_{Y - 1}^{P_{y - 1}}} - {{DATA\_ END}{\_ TIME}_{X}^{P_{x}}}}} & (10) \\{{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} = {\frac{packet\_ length}{packet\_ speed} \cdot \left( {\frac{1}{{BASERATE}_{Y - 1}} - \frac{1}{{BASERATE}_{X}}} \right)}} & (11) \\{{{Round\_ Trip}{\_ Delay}^{\lbrack{P_{X}{OP}_{Y}}\rbrack}} = {\sum\limits_{n = {X + 1}}^{Y - 1}{\left( {{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}} + {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}\rightarrow{P^{\prime}}_{n}}}} \right){2 \cdot {cable\_ delay}_{X}}}}} & (12) \\{{Then},} & \; \\{{Idle}^{P_{x}} = {{{Round\_ Trip}{\_ Delay}^{\lbrack{P_{X}{OP}_{Y}}\rbrack}} + {RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} + {DE\_ delta}^{\lbrack{P_{y - 1},P_{x}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}}} & (13)\end{matrix}$Substituting into Equation (1), Ack and Iso gaps are preservednetwork-wide if and only if:

$\begin{matrix}{\begin{bmatrix}{{{Round\_ Trip}{\_ Delay}^{\lbrack{P_{X}{OP}_{Y}}\rbrack}} + {RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} +} \\{{DE\_ delta}^{\lbrack{P_{y - 1},P_{x}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}}\end{bmatrix}_{\max} < {subaction\_ gap}_{\min}^{P_{x}}} & (14)\end{matrix}$

The minimum subaction_gap at point P_(x) isn't well known.IEEE1394-1995, in Table 4-33, defines the minimum subaction_gap timeoutused at a PHY's internal state machines, not at the external interface.It has been argued that the internal and external representations oftime may differ by as much as ARB_RESPONSE_DELAY when a PHY is countingelapsed time between an internally generated event and an externallyreceived event. However, the ARB_RESPONSE_DELAY value for a particularPHY isn't generally known externally. Fortunately, theARB_RESPONSE_DELAY value for a PHY whose FIFO is known to be empty isbounded by the worst case PHY_DELAY reported within the PHY registermap. This suggests a realistic bound for the minimum subaction_gapreferenced at point P_(x):

$\begin{matrix}{{subaction\_ gap}_{\min}^{P_{X}} \geq {{subaction\_ gap}_{\min}^{i_{x}} - {PHY\_ DELAY}_{X,\max}^{P_{x}}}} & (15)\end{matrix}$where

$\begin{matrix}{{subaction\_ gap}_{\min}^{i_{x}} = \frac{27 + {{gap\_ count} \cdot 16}}{{BASERATE}_{X,\max}}} & (16)\end{matrix}$Combing Equations (14), (15), and (16):

$\begin{matrix}{\begin{bmatrix}{{{Round\_ Trip}{\_ Delay}^{\lbrack{P_{X}{OP}_{Y}}\rbrack}} +} \\{{RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} +} \\{{DE\_ delta}^{\lbrack{P_{y - 1},P_{x}}\rbrack} +} \\{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}\end{bmatrix}_{\max} < \left\lbrack {\frac{27 + {{gap\_ count} \cdot 16}}{{BASERATE}_{X,\max}} - {PHY\_ DELAY}_{X,\max}^{P_{x}}} \right\rbrack} & (17)\end{matrix}$Solving for gap_count:

$\begin{matrix}{{gap\_ count} > \frac{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{x}{OP}_{y}}\rbrack}} +} \\{\begin{bmatrix}{{RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} +} \\{{DE\_ delta}^{\lbrack{P_{y - 1},P_{x}}\rbrack} +} \\{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}\end{bmatrix}_{\max} +} \\{PHY\_ DELAY}_{X,\max}^{P_{x}}\end{bmatrix}} - 27}{16}} & (18)\end{matrix}$

Since RESPONSE_TIME, DE_delta, and PPM_delta are not independentparameters, the maximum of their sum is not accurately represented bythe sum of their maximas. Finding a more accurate maximum for thecombined quantity requires the identification of components ofRESPONSE_TIME.

As specified in p1394a, RESPONSE_TIME includes the time a respondingnode takes to repeat the received packet and then drive a subsequentarbitration indication. (Note that by examination of the C code,RESPONSE_TIME is defined to include the time it takes to repeat a packeteven if the PHY in question is a leaf node.) FIG. 3 illustrates thesequence PHY Y will follow in responding to a received packet. i_(Y)denotes the timings as seen/interpreted by the PHY state machine. Notethat P_(Y) can be any repeating port on PHY Y. Consequently, the timingconstraints referenced to P_(Y) in the following analysis must holdworst case for any and all repeating ports.

Beginning with the first arrival of data at P′_(Y) (t₃), the elaboratedtiming sequence for RESPONSE_TIME is:

t₃ First bit of packet received at point P′_(Y) t₃′ First bit of packetrepeated at point P_(Y). t₃′ lags t₃ by PHY_DELAY t₄ Last bit of packetreceived at point P′_(Y). t₄ follows t₃ by the length of the packettimed in PHY N's clock domain. DATA_END begins t₄′ Last bit of packetrepeated at point P_(Y). t₄′ lags t₃′ by the length of the packet timedin PHY Y's clock domain. The PHY begins “repeating” DATA_END t₅ DATA_ENDconcludes at point P′_(Y). t₅ follows t₄ by DATA_END_TIME_(Y−1) ^(P)^(Y−1) t_(5a) stop_tx_packet( ) concludes at point i_(Y) and the statemachines command the PHY ports to stop repeating DATA_END. t_(5a) leadst₅′ by any transceiver delay. t₅′ DATA_END concludes at point P_(Y). t₅′follows t₄′ by DATA_END_TIME_(Y) ^(P) ^(Y) t_(5b) start_tx_packet( )commences at point i_(Y) and the state machines command the PHY ports tobegin driving the first arbitration indication of any response. t_(5b)lags t_(5a) by an IDLE_GAP and an unspecified state machine delay hereincalled SM_DELAY. t₆ PHY Y drives arbitration at points P′_(Y). t₆follows t_(5b) by any transceiver delay.

$\quad\begin{matrix}{t_{3^{\prime}} = {t_{3} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}}}} & (19) \\{t_{4^{\prime}} = {{t_{3^{\prime}} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y}}} = {t_{3} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y}}}}} & (20) \\{t_{5^{\prime}} = {{t_{4^{\prime}} + {{DATA\_ END}{\_ TIME}_{Y}^{P_{Y}}}} = {t_{3} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y}} + {{DATA\_ END}{\_ TIME}_{Y}^{P_{Y}}}}}} & (21) \\{t_{5a} = {{t_{5^{\prime}} - {transceiver\_ delay}_{Y}^{P_{Y}}} = {t_{3} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y}} + {{DATA\_ END}{\_ TIME}_{Y}^{P_{Y}}} - {transceiver\_ delay}_{Y}^{P_{Y}}}}} & (22) \\{t_{5b} = {{t_{5a} + {IDLE\_ GAP}_{Y} + {SM\_ DELAY}_{Y}} = {t_{3} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y}} + {{DATA\_ END}{\_ TIME}_{Y}^{P_{Y}}} + {IDLE\_ GAP}_{Y} + {SM\_ DELAY}_{Y} - {transceiver\_ delay}_{Y}^{P_{Y}}}}} & (23) \\{t_{6} = {{t_{5b} + {transceiver\_ delay}_{Y}^{P_{Y}}} = {t_{3} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{Y}} + {{DATA\_ END}{\_ TIME}_{Y}^{P_{Y}}} + {IDLE\_ GAP}_{Y} + {SM\_ DELAY}_{Y} + {transceiver\_ delay}_{Y}^{P_{Y}} - {transceiver\_ delay}_{Y}^{P_{Y}}}}} & (24)\end{matrix}$By definition,

$\begin{matrix}{{RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} = {t_{6} - t_{5}}} & (25)\end{matrix}$and through substitution:

$\begin{matrix}{{RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} = {{PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} + {DE\_ delta}^{\lbrack{P_{y},P_{y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{Y,Y}\rbrack} + {IDLE\_ GAP}_{Y} + {SM\_ DELAY}_{Y} + {transceiver\_ delay}_{Y}^{P_{Y}} - {transceiver\_ delay}_{Y}^{P_{Y}}}} & (26)\end{matrix}$As such, the combination of RESPONSE_TIME, DE_delta, and PPM_delta fromequation (18) can be represented as:

$\begin{matrix}{\begin{bmatrix}{{RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} +} \\{{DE\_ delta}^{\lbrack{P_{y - 1},P_{x}}\rbrack} +} \\{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}\end{bmatrix} = {\begin{matrix}\left\lbrack \begin{matrix}\begin{matrix}{{PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{DE\_ delta}^{\lbrack{P_{y},P_{y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{Y,{Y - 1}}\rbrack} +}\end{matrix} \\{{IDLE\_ GAP}_{Y} + {SM\_ DELAY}_{Y} +} \\{{transceiver\_ delay}_{Y}^{P_{Y}} - {transceiver\_ delay}_{Y}^{P_{Y}} +} \\{{DE\_ delta}^{\lbrack{P_{y - 1},P_{x}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}}\end{matrix} \right\rbrack \\\begin{bmatrix}\begin{matrix}{{PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{DE\_ delta}^{\lbrack{P_{y,},P_{x}}\rbrack} + {PPM\_ delta}^{\lbrack{Y,X}\rbrack} +}\end{matrix} \\{{IDLE\_ GAP}_{Y} + {SM\_ DELAY}_{Y} +} \\{{transceiver\_ delay}_{Y}^{P_{Y}} - {transceiver\_ delay}_{Y}^{P_{Y}}}\end{bmatrix}\end{matrix} =}} & (27)\end{matrix}$Noting that if PHYs X and Y−1 both adhere to the same minimum timingrequirement for DATA_END_TIME and maximum timing requirement forBASE_RATE, then

$\quad\begin{matrix}\begin{matrix}{{DE\_ delta}_{\max}^{\lbrack{P_{Y,},P_{X}}\rbrack} = {DE\_ delta}^{\lbrack{P_{Y,},P_{Y - 1}}\rbrack}} \\{{PPM\_ delta}_{\max}^{\lbrack{Y,X}\rbrack} = {PPM\_ delta}_{\max}^{\lbrack{Y,{Y - 1}}\rbrack}}\end{matrix} & (28)\end{matrix}$The combined maximum can be rewritten as:

$\begin{matrix}{\begin{bmatrix}{{RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} +} \\{{DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} +} \\{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}\end{bmatrix}_{\max} = \left\lbrack \begin{matrix}\begin{matrix}{{PHY\_ DELAY}_{Y,\max}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{DE\_ delta}_{\max}^{\lbrack{P_{Y,},P_{Y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{Y,{Y - 1}}\rbrack} +}\end{matrix} \\{{IDLE\_ GAP}_{Y,\max} + {SM\_ DELAY}_{Y,\max} +} \\{{transceiver\_ delay}_{Y,\max}^{P_{Y}} - {transceiver\_ delay}_{Y,\min}^{P_{Y}}}\end{matrix} \right\rbrack} & (29)\end{matrix}$Comparing to equation (26) allows

$\begin{matrix}{\begin{bmatrix}{{{RESPONSE}_{-}{TIME}_{Y}^{P_{Y}^{\prime}}} +} \\{{DE\_ delta}^{\lbrack{P_{{Y - 1},}P_{X}}\rbrack} +} \\{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}\end{bmatrix}_{\max\;} = {RESPONSE\_ TIME}_{Y,\max}^{P_{Y}^{\prime}}} & (30)\end{matrix}$Finally:

$\begin{matrix}{{gap\_ count} > \frac{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} +} \\{{RESPONSE\_ TIME}_{Y,\max}^{P_{Y}^{\prime}} +} \\{PHY\_ DELAY}_{X,\max}^{P_{X}}\end{bmatrix}} - 27}{16}} & (31)\end{matrix}$

For any given topology, the gap count must be set such that subactiongaps observed/generated at one PHY aren't falsely interpreted asarb_reset gaps by another PHY in the network. Subaction gaps are knownto be at their largest nearest the PHY that originated the last packet.To ensure that the most recent originating PHY doesn't begin a newfairness interval before all PHYs exit the current one, itsarb_reset_gap timeout must be greater than the largest subaction_gapwhich can legally occur. FIG. 4 illustrates the case in which PHY Xoriginated the most recent packet and PHY Y is responding after asubaction gap with arbitration for the current fairness interval.

For all topologies, the idle time observed at point P_(x) must notexceed the arbitration reset gap detection time:

$\begin{matrix}{{Idle}_{\max}^{P_{X}} < {{arb\_ reset}{\_ gap}_{\min}^{P_{X}}}} & (32)\end{matrix}$

The analysis is identical to the case in which Ack and Iso gaps arepreserved with the exception that PHY Y takes longer to respond to thetrailing edge of DATA_END. Let PHY Y have a response time ofsubaction_response_time. Then,

$\begin{matrix}{{Idle}^{P_{X\;}} = {{{Round\_ Trip}{\_ Delay}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} + {{subaction\_ response}{\_ time}_{Y}^{P_{Y}^{\prime}}} + {DE\_ delta}^{\lbrack{P_{{Y - 1},}P_{X}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}}} & (33)\end{matrix}$

Substituting into Equation (32), subaction gaps are preservednetwork-wide if and only if:

$\begin{matrix}{\begin{bmatrix}{{{Round\_ Trip}{\_ Delay}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} +} \\{{{subaction\_ response}{\_ time}_{Y}^{P_{Y}^{\prime}}} +} \\{{DE\_ delta}^{\lbrack{P_{{Y - 1},}P_{X}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}}\end{bmatrix}_{\max} < {{arb\_ reset}{\_ gap}_{\min}^{P_{X}}}} & (34)\end{matrix}$

The minimum arb_reset_gap at point P_(x) isn't well known.IEEE1394-1995, in Table 4-33, defines the minimum arb_reset_gap timeoutused at a PHY's internal state machines, not at the external interface.It has been argued that the internal and external representations oftime may differ by as much as ARB_RESPONSE_DELAY when a PHY is countingelapsed time between an internally generated event and an externallyreceived event. However, the ARB_RESPONSE_DELAY value for a particularPHY isn't generally known externally. Fortunately, theARB_RESPONSE_DELAY value for a PHY whose FIFO is known to be empty isbounded by the worst case PHY_DELAY reported within the PHY registermap. This suggests a realistic bound for the minimum subaction_gapreferenced at point P_(x):

$\begin{matrix}{{{arb\_ reset}{\_ gap}_{\min}^{P_{x}}} \geq {{{arb\_ reset}{\_ gap}_{\min}^{i_{x}}} - {PHY\_ DELAY}_{X,\max}^{P_{x}\;}}} & (35)\end{matrix}$where

$\begin{matrix}{{{arb\_ reset}{\_ gap}_{\min}^{i_{x}}} = \frac{51 + {{gap\_ count} \cdot 32}}{{BASERATE}_{X,\max}}} & (36)\end{matrix}$

The maximum subaction_response_time for PHY Y parallels the earlierdissection of RESPONSE_TIME. The timing sequence forsubaction_response_time is identical to that of RESPONSE_TIME exceptthat PHY Y, after concluding stop_tx_Packet( ), must wait to detect asubaction gap and then wait an additional arb_delay before callingstart_tx_packet( ). Said differently, the idle period timed internallyis a subaction gap plus arb_delay rather than an IDLE_GAP. Consequently,t_(5b) becomes:t _(5b) =t _(5a)+subaction_gap^(ir) +arb_delay^(ir) +SM_DELAY_(Y)  (37)and

$\begin{matrix}{{{subaction\_ response}{\_ time}_{Y}^{P_{Y}^{\prime}}} = {{RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} - {IDLE\_ GAP}_{Y} + {subaction\_ gap}^{i_{Y}} + {arb\_ delay}^{i_{Y}}}} & (38)\end{matrix}$Substituting into Equation (34),

$\begin{matrix}{\begin{bmatrix}{{{Round\_ Trip}{\_ Delay}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} + {RESPONSE\_ TIME}_{Y}^{P_{Y}^{\prime}} +} \\{{DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} +} \\{{subaction\_ gap}^{i_{Y}} + {arb\_ delay}^{i_{Y}} - {IDLE\_ GAP}_{Y}}\end{bmatrix}_{\max} < {{arb\_ reset}{\_ gap}_{\min}^{P_{x}}}} & (39)\end{matrix}$

Again, RESPONSE_TIME, DE_delta, and PPM_delta are not independentparameters. As shown previously, if PHYs X and Y−1 adhere to the sametiming constant limits, the explicit DE_Delta and PPM_delta terms can besubsumed within RESPONSE_TIME giving:

$\begin{matrix}{\begin{bmatrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} + {RESPONSE\_ TIME}_{Y,\max}^{P_{Y}^{\prime}} +} \\{{subaction\_ gap}_{\max}^{i_{Y}} + {arb\_ delay}_{\max}^{i_{Y}} - {{MIN\_ IDLE}{\_ TIME}_{Y}}}\end{bmatrix} < {{arb\_ reset}{\_ gap}_{\min}^{P_{x}}}} & (40)\end{matrix}$where

$\begin{matrix}{{subaction\_ gap}_{\max}^{i_{Y}} = \frac{29 + {{gap\_ count} \cdot 16}}{{BASERATE}_{Y,\min}}} & (41) \\{{arb\_ delay}_{\max}^{i_{Y}} = \frac{{gap\_ count} \cdot 4}{{BASERATE}_{Y,\min}}} & (42)\end{matrix}$andIDLE_GAP_(Y,min)=MIN_IDLE_TIME_(Y)  (43)Combining Equations (35), (36), (40), (41), and (42):

$\begin{matrix}{\begin{bmatrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} +} \\{{RESPONSE\_ TIME}_{Y,\max}^{P_{Y}^{\prime}} -} \\{{{MIN\_ IDLE}{\_ TIME}_{Y}} +} \\\frac{29 + {{gap\_ count} \cdot 20}}{{BASERATE}_{Y,\min}}\end{bmatrix} < \left\lbrack {\frac{51 + {{gap\_ count} \cdot 32}}{{BASERATE}_{X,\max}} - {PHY\_ DELAY}_{X,\max}^{P_{x}}} \right\rbrack} & (44)\end{matrix}$Solving for gap_count:

$\begin{matrix}{{gap\_ count} > \frac{\begin{matrix}{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} +} \\{{RESPONSE\_ TIME}_{Y,\max}^{P_{Y}^{\prime}} -} \\{{{MIN\_ IDLE}{\_ TIME}_{y}} +} \\{PHY\_ DELAY}_{X,\max}^{P_{X}}\end{bmatrix}} +} \\{{29 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}} - 51}\end{matrix}}{32 - {20 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}}}} & (45)\end{matrix}$

For any given topology, the gap count must be set such that if asubaction gap is observed following an isochronous packet at one PHY, itis observed at all PHYs. The danger occurs when a subsequent arbitrationindication is transmitted in the same direction as the previous datapacket. Given that arbitration indications may propagate throughintervening PHYs faster than data bits, gaps may be shortened as theyare repeated. FIG. 5 illustrates the case in which PHY X originates anisochronous packet, observes a subaction_gap, and begins to drive anarbitration indication.

For all topologies, the minimum idle time observed at point P′_(Y) mustalways exceed the maximum subaction gap detection time:

$\begin{matrix}{{Idle}_{\min}^{P_{Y}^{\prime}} > {subaction\_ gap}_{\max}^{P_{Y}^{\prime}}} & (46)\end{matrix}$

The time events t₀ through t₅ are identical to the previous analyses. Inthis scenario, t₆ follows t₂ by the time it takes PHY X to timesubaction_gap and arb_delay:

$\begin{matrix}\begin{matrix}{t_{6} = {t_{2} + {subaction\_ gap}^{P_{x}} + {arb\_ delay}^{P_{x}}}} \\{= {t_{0} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{X}} + {{DATA\_ END}{\_ TIME}_{X}^{P_{X}}} +}} \\{{subaction\_ gap}^{P_{x}} + {arb\_ delay}^{P_{x}}}\end{matrix} & (47)\end{matrix}$

The 1995 specification provides the timeouts used internally by thestate machine. The externally observed timing requirements could differ(given possible mismatches in transceiver delay and state machinesbetween the leading edge of IDLE and the leading edge of the subsequentarbitration indication). However, previous works have suggested any suchdelays could and should be well matched and that the external timingwould follow the internal timing exactly. Consequently,subaction_gap^(P) ^(x) +arb_delay^(P) ^(x) =subaction_gap^(i) ^(x)+arb_delay^(i) ^(x)   (48)T7 follows T6 by the time it takes the arbitration signal to propagatethrough the intervening PHYs and cables:

$\begin{matrix}\begin{matrix}{t_{7} = {t_{6} + {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}^{\prime}->P_{n}}}} \right)} +}} \\{{cable\_ delay}_{X}} \\{= {t_{0} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{X}} + {{DATA\_ END}{\_ TIME}_{X}^{P_{X}}} +}} \\{{subtract\_ gap}^{i_{x}} + {arb\_ delay}^{i_{x}} +} \\{{\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}^{\prime}->P_{n}}}} \right)} +} \\{{cable\_ delay}_{X}}\end{matrix} & (49)\end{matrix}$Given t₀ through t₇ above, the Idle time seen at point P′_(Y) is givenas:

$\quad\begin{matrix}{{Idle}^{P_{y}^{\prime}} = {{t_{7} - t_{5}} = {{subaction\_ gap}^{i_{x}} + {arb\_ delay}^{i_{x}} - {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}} - {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}}} \right)} - {DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} - {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}}}} & (50) \\{Let} & \; \\{{{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{X}\rightarrow R_{Y}}\rbrack}} = {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}} - {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}}} \right)}} & (51) \\{{Then},} & \; \\{{Idle}^{P_{y}^{\prime}} = {{t_{7} - t_{5}} = {{subaction\_ gap}^{i_{x}} + {arb\_ delay}^{i_{x}} - {{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{X}\rightarrow R_{Y}}\rbrack}} - {DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} - {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}}}} & (52)\end{matrix}$

For the maximum subaction_gap detection time at point P′_(Y), the 1995standard again only specifies the internal state machine timeout values.FIG. 6 provides the timing reference for relating the external gapdetection times to the internal ones. The elaborated timing sequence isidentical to the case for RESPONSE_TIME through point t₅′. The remainingsequence is:

T₇ The arbitration indication launched by PHY X arrives at point P′_(Y)T_(7a) The arbitration indication launched by PHY X arrives at point iY.t_(7a) lags t₇ by an unspecified arbitration detection time, hereintermed ARB_DETECTION_TIMEThe externally seen gap at point P′_(Y) is given asgap^(P′) ^(Y) =t ₇ −t ₅  (53)The corresponding internal gap at point iY isgap^(i) ^(y) =t _(7a) −t _(5a)  (54)Given that

t_(7a) = t₇ + ARB_DETECTION_TIME_(Y) ^(P′) ^(Y)the external gap can be expressed as

$\quad\begin{matrix}\begin{matrix}{{gap}^{P_{Y}^{\prime}} = {t_{7} - t_{5}}} \\{= {t_{7a} - t_{5} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}} \\{= {t_{7a} - t_{5a} + t_{5a} - t_{5} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}} \\{= {{gap}^{i_{Y}} + t_{5a} - t_{5} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}} \\{= {{gap}^{i_{Y}} + {PHY\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}} + {DE\_ delta}^{\lbrack{P_{Y},P_{Y - 1}}\rbrack} +}} \\{{PPM\_ delta}^{\lbrack{Y,{Y - 1}}\rbrack} - {transceiver\_ delay}_{Y}^{P_{Y}} -} \\{{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}\end{matrix} & (56)\end{matrix}$Consequently,

$\quad\begin{matrix}{{subaction\_ gap}^{P_{Y}^{\prime}} = {{subaction\_ gap}^{i_{Y}} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} + {DE\_ delta}^{\lbrack{P_{Y},P_{Y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{Y,{Y - 1}}\rbrack} - {transceiver\_ delay}_{Y}^{P_{Y}} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}} & (57)\end{matrix}$Substituting (52) and (57) into (46) yields

$\quad\begin{matrix}{\begin{bmatrix}{{subaction\_ gap}^{i_{x}} + {arb\_ delay}^{i_{x}} -} \\{{{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{x}\rightarrow P_{Y}}\rbrack}} -} \\{{DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} -} \\{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}\end{bmatrix} > \begin{bmatrix}{{subaction\_ gap}^{i_{x}} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{DE\_ delta}^{\lbrack P_{Y,P_{Y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} -} \\{{transceiver\_ delay}_{Y}^{P_{Y}} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}\end{bmatrix}} & (58)\end{matrix}$The inequality holds generally if

$\quad\begin{matrix}{\left\lbrack {{subaction\_ gap}^{i_{x}} + {arb\_ delay}^{i_{x}}} \right\rbrack_{\min} > \begin{bmatrix}{{subaction\_ gap}^{i_{x}} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{DE\_ delta}^{\lbrack P_{Y,P_{Y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} +} \\{{DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} - {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} +} \\{{{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{x}\rightarrow P_{Y}}\rbrack}} -} \\{{transceiver\_ delay}_{Y}^{P_{Y}} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}\end{bmatrix}_{\max}} & (59)\end{matrix}$Combining the DE_Delta and PPM_delta terms gives:

$\quad\begin{matrix}{\left\lbrack {{subaction\_ gap}^{i_{x}} + {arb\_ delay}^{i_{x}}} \right\rbrack_{\min} > \begin{bmatrix}{{subaction\_ gap}^{i_{x}} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{DE\_ delta}^{\lbrack{P_{Y},P_{X}}\rbrack} + {PPM\_ delta}^{\lbrack{Y,X}\rbrack} +} \\{{{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{x}\rightarrow P_{Y}}\rbrack}} -} \\{{transceiver\_ delay}_{Y}^{P_{Y}} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}\end{bmatrix}_{\max}} & (60)\end{matrix}$By assumingDE_delta^([P) ^(Y) ^(,P) ^(X) ^(])+PPM_delta^([Y,X])≦transceiver_delay_(Y) ^(P) ^(Y)+ARB_DETECTION_TIME_(Y) ^(P′) ^(Y)   (61)the constraining inequality can be further simplified to give

$\quad\begin{matrix}{\left\lbrack {{subaction\_ gap}^{i_{x}} + {arb\_ delay}^{i_{x}}} \right\rbrack_{\min} > \begin{bmatrix}{{subaction\_ gap}^{i_{x}} + {PHY\_ DELAY}_{Y,\max}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{Data\_ Arb}{\_ Mismatch}_{\max}^{\lbrack{P_{x}\rightarrow P_{Y}}\rbrack}}\end{bmatrix}} & (62)\end{matrix}$where

$\quad\begin{matrix}{{subaction\_ gap}_{\min}^{i_{x}} = \frac{27 + {{gap\_ count} \cdot 16}}{{BASERATE}_{X,\max}}} & (63) \\{{arb\_ delay}_{\min}^{i_{x}} = \frac{{gap\_ count} \cdot 4}{{BASERATE}_{X,{man}}}} & (64) \\{and} & \; \\{{subaction\_ gap}_{\max}^{i_{y}} = \frac{29 + {{gap\_ count} \cdot 16}}{{BASERATE}_{Y,\min}}} & (65)\end{matrix}$Solving for gap count,

$\begin{matrix}{{gap\_ count} > \frac{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{PHY\_ DELAY}_{Y,\max}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{Data\_ Arb}{\_ Mismatch}_{\max}^{\lbrack{P_{x}\rightarrow P_{Y}}\rbrack}}\end{bmatrix}} + {29 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}} - 27}{20 - {16 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}}}} & (66)\end{matrix}$

For any given topology, the gap count must be set such that if anarbitration reset gap is observed following an asynchronous packet atone PHY, it is observed at all PHYs. The danger occurs when a subsequentarbitration indication is transmitted in the same direction as theprevious data packet. Given that arbitration indications may propagatethrough intervening PHYs faster than data bits, gaps may be shortened asthey are repeated. FIG. 7 illustrates the case in which PHY X originatesan asynchronous packet, observes an arbitration reset gap, and begins todrive an arbitration indication.

For all topologies, the minimum idle time observed at point P′_(Y) mustalways exceed the maximum arbitration reset gap detection time:

$\begin{matrix}{{Idle}_{\min}^{P_{Y}^{\prime}} > {{arb\_ reset}{\_ gap}_{\max}^{P_{Y}^{\prime\;}\;}}} & (67)\end{matrix}$

The time events t₀ through t₅ are identical to the previous analyses. Inthis scenario, t₆ follows t₂ by the time it takes PHY X to timearb_reset_gap and arb_delay:

$\begin{matrix}{t_{6} = {{t_{2} + {arb\_ reset} - {gap}^{P_{X}} + {arb\_ delay}^{P_{X}}} = {t_{0} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{X}} + {{DATA\_ END}{\_ TIME}_{X}^{P_{x}}} + {{arb\_ reset}{\_ gap}^{P_{X}}} + {arb\_ delay}^{P_{X}}}}} & (68)\end{matrix}$

The 1995 IEEE 1394 standard provides the timeouts used internally by thestate machine. The externally observed timing requirements could differ(given possible mismatches in transceiver delay and state machinesbetween the leading edge of IDLE and the leading edge of the subsequentarbitration indication). However, previous works have suggested any suchdelays could and should be well matched and that the external timingwould follow the internal timing exactly. Consequently,arb_reset_gap^(P) ^(x) +arb_delay^(P) ^(x) =arb_reset_gap^(i) ^(x)+arb_delay^(i) ^(x)   (69)

T7 follows T6 by the time it takes the arbitration signal to propagatethrough the intervening PHYs and cables:

$\quad\begin{matrix}\begin{matrix}{t_{7} = {t_{6} + {\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}}} \right)} +}} \\{{cable\_ delay} - X} \\{= {t_{0} + \frac{packet\_ length}{{packet\_ speed} \cdot {BASEREAT}_{X}} + {{DATA\_ END}{\_ TIME}_{X}^{P_{x}}} +}} \\{{{arb\_ reset}{\_ gap}^{i_{X}}} + {arb\_ delay}^{i_{X}} +} \\{{\sum\limits_{n = {X + 1}}^{Y - 1}\left( {{cable\_ delay}_{n} + {{ARB\_ RESPONSE}{\_ DELAY}_{n}^{P_{n}^{\prime}\rightarrow P_{n}}}} \right)} +} \\{{cable\_ delay} - X}\end{matrix} & (70)\end{matrix}$

Given t₀ through t₇ above, the Idle time seen at point P′_(Y) is givenas:

$\begin{matrix}{{Idle}^{P_{Y}^{\prime}} = {{t_{7} - t_{5}} = {{{arb\_ reset}{\_ gap}^{i_{X}}} + {arb\_ delay}^{i_{X}} - {{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{x}\rightarrow P_{Y}}\rbrack}} - {DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} - {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}}}} & (71)\end{matrix}$

For the maximum arbitration_reset_gap detection time at point P′_(Y),equation (56) gives:

$\begin{matrix}{{{arb\_ reset}{\_ gap}^{P_{Y}^{\prime}}} = {{{arb\_ reset}{\_ gap}^{i_{Y}}} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} + {DE\_ delta}^{\lbrack P_{Y,P_{Y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} - {transceiver\_ delay}_{Y}^{P_{Y}} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}} & (72)\end{matrix}$

Substituting (71) and (72) into (67) yields

$\quad\begin{matrix}{\begin{bmatrix}{{{arb\_ reset}{\_ gap}^{i_{X}}} + {arb\_ delay}^{i_{x}} -} \\{{{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{x}\rightarrow P_{Y}}\rbrack}} -} \\{{DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} -} \\{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack}\end{bmatrix} > \begin{bmatrix}{{{arb\_ reset}{\_ gap}^{i_{Y}}} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{DE\_ delta}^{\lbrack P_{Y,P_{Y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} -} \\{{transceiver\_ delay}_{Y}^{P_{Y}} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}\end{bmatrix}} & (73)\end{matrix}$

The inequality holds generally if

$\quad\begin{matrix}{\left\lbrack {{{arb\_ reset}{\_ gap}^{i_{X}}} + {arb\_ delay}^{i_{x}}} \right\rbrack_{\min} > \begin{bmatrix}{{{arb\_ reset}{\_ gap}^{i_{Y}}} + {PHY\_ DELAY}_{Y}^{P_{Y}^{\prime}\rightarrow P_{Y}} +} \\{{DE\_ delta}^{\lbrack{P_{Y},P_{Y - 1}}\rbrack} + {PPM\_ delta}^{\lbrack{Y,{Y - 1}}\rbrack} +} \\{{DE\_ delta}^{\lbrack{P_{Y - 1},P_{X}}\rbrack} + {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} +} \\{{{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{x}\rightarrow P_{Y}}\rbrack}} -} \\{{transceiver\_ delay}_{Y}^{P_{Y}} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{P_{Y}^{\prime}}}}\end{bmatrix}_{\max}} & (74)\end{matrix}$

Combining the DE_Delta and PPM_delta terms gives:

$\;\begin{matrix}{\left\lbrack {{{arb\_ reset}{\_ gap}^{i_{x}}} + {arb\_ delay}^{i_{x}}} \right\rbrack_{\min} > {\quad\begin{bmatrix}{{{arb\_ reset}{\_ gap}^{i_{Y}}} + {PHY\_ DELAY}_{Y}^{{P^{\prime}}_{Y}->P_{Y}} +} & \; \\\begin{matrix}{{DE\_ delta}^{\lbrack{P_{Y},P_{X}}\rbrack} + {PPM\_ delta}^{\lbrack{Y,X}\rbrack} +} \\{{{Data\_ Arb}{\_ Mismatch}^{\lbrack{P_{X}->P_{Y}}\rbrack}} -} \\{{transceiver\_ delay}_{Y}^{P_{Y}} - {{ARB\_ DETECTION}{\_ TIME}_{Y}^{{P^{\prime}}_{Y}}}}\end{matrix} & \;\end{bmatrix}_{\max}}} & (75)\end{matrix}$By requiringDE_delta^([P) ^(Y) ^(,P) ^(X) ^(])+PPM_delta^([Y,X])≦transceiver_delay_(Y) ^(P) ^(Y)+ARB_DETECTION_TIME_(Y) ^(P′) ^(Y) _(Y)  (76)

the constraining inequality can be further simplified to give

$\;\begin{matrix}{\left\lbrack {{{arb\_ reset}{\_ gap}_{\min}^{i_{x}}} + {arb\_ delay}_{\min}^{i_{x}}} \right\rbrack > {\quad\begin{bmatrix}{{{arb\_ reset}{\_ gap}_{\max}^{i_{Y}}} + {PHY\_ DELAY}_{Y,\max}^{P_{Y}^{\prime}->P_{Y}} +} & \; \\{{Data\_ Arb}{\_ Mismatch}_{\max}^{\lbrack{P_{X}->P_{Y}}\rbrack}} & \;\end{bmatrix}}} & (77)\end{matrix}$where

$\begin{matrix}{{{arb\_ reset}{\_ gap}_{\min}^{i_{x}}} = \frac{51 + {{gap\_ count} \cdot 32}}{{BASERATE}_{X,\max}}} & (78) \\{{arb\_ delay}_{\min}^{i_{x}} = {\frac{{gap\_ count} \cdot 4}{{BASERATE}_{X,\max}}\mspace{14mu}{and}}} & (79) \\{{{arb\_ reset}{\_ gap}_{\max}^{i_{Y}}} = \frac{53 + {{gap\_ count} \cdot 32}}{{BASERATE}_{Y,\min}}} & (80)\end{matrix}$

Solving for gap count,

$\begin{matrix}{{gap\_ count} > \frac{\begin{matrix}{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{PHY\_ DELAY}_{Y,\max}^{{P^{\prime}}_{Y}->P_{Y}} +} \\{{Data\_ Arb}{\_ Mismatch}_{\max}^{\lbrack{P_{X}->P_{Y}}\rbrack}}\end{bmatrix}} +} \\{{53 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}} - 51}\end{matrix}}{36 - {32 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}}}} & (81)\end{matrix}$

Equations (31), (45), (66) and (81) place a lower bound on gap count.Let:

$\begin{matrix}{{gap\_ count}_{A} = \frac{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} +} \\{{RESPONSE\_ TIME}_{Y,\max}^{P_{Y}^{\prime}} +} \\{PHY\_ DELAY}_{X,\max}^{P_{X}}\end{bmatrix}} - 27}{16}} & (82) \\{{gap\_ count}_{B} = \frac{\begin{matrix}{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} +} \\{{RESPONSE\_ TIME}_{Y,\max}^{P_{Y}^{\prime}} -} \\{{{MIN\_ IDLE}{\_ TIME}_{Y}} +} \\{PHY\_ DELAY}_{X,\max}^{P_{X}}\end{bmatrix}} +} \\{{29 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}} - 51}\end{matrix}}{32 - {20 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}}}} & (83) \\{{gap\_ count}_{C} = \frac{\begin{matrix}{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{{Data\_ Arb}{\_ Mismatch}_{\max}^{\lbrack{P_{X}->P_{Y}}\rbrack}} +} \\{PHY\_ DELAY}_{Y,\max}^{P_{Y}^{\prime}->P_{Y}}\end{bmatrix}} +} \\{{29 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}} - 27}\end{matrix}}{20 - {16 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}}}} & (84) \\{{gap\_ count}_{D} = \frac{\begin{matrix}{{{BASERATE}_{X,\max} \cdot \begin{bmatrix}{{{Data\_ Arb}{\_ Mismatch}_{\max}^{\lbrack{P_{X}->P_{Y}}\rbrack}} +} \\{PHY\_ DELAY}_{Y,\max}^{P_{Y}^{\prime}->P_{Y}}\end{bmatrix}} +} \\{{53 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}} - 51}\end{matrix}}{36 - {32 \cdot \frac{{BASERATE}_{X,\max}}{{BASERATE}_{Y,\min}}}}} & (85)\end{matrix}$

Given the ratio of maximum to minimum BASERATE is always >1 and thatMIN_IDLE_TIME is ˜40 ns, it is clear that:gap_count_(B)>gap_count_(A)  (86)andgap_count_(D)>gap_count_(C)  (87)

To select an appropriate gap count for a given topology, bothgap_count_(B) and gap_count_(D) must be calculated, rounded up to thenext integer, and the maximum of the two results selected.

For IEEE1394-1995 style topologies (assumed to be limited to 4.5 mcables and a worst case PHY_DELAY of 144 ns), a table can be constructedto provide the gap count setting as a function of hops. In constructingsuch a table, the constant values in Table 2 are assumed.

TABLE 2 PHY Timing Constants Parameter Minimum MaximumARB_RESPONSE_DELAY¹ PHY_DELAY(max) − 60 ns PHY_DELAY(max) BASERATE98.294 mbps 98.314 mbps cable_delay 22.725 ns MIN_IDLE_TIME 40 nsPHY_DELAY 144 ns RESPONSE_TIME PHY_DELAY + 100 ns

The resulting gap count versus Cable Hops can then be calculated:

TABLE 3 Gap Count as a function of hops Hops Gap Count 1 5 2 7 3 8 4 105 13 6 16 7 18 8 21 9 24 10 26 11 29 12 32 13 35 14 37 15 40 16 43 17 4618 48 19 51 20 54 21 57 22 59 23 62

Pinging provides an effective way to set an optimal gap count fortopologies with initially unspecified or unknown PHY or cable delays.Specifically, pinging allows determination of an instantaneousRound_Trip_Delay between two given points. Once the worst caseRound_Trip Delay has been determined via pinging, gap_count_(b) andgap_count_(d) can be calculated and the appropriate gap count selected.

The Jitter value specified in the PHY register map was introduced tohelp relate instantaneous measurements of ROUND_TRIP_DELAY to themaximum possible ROUND_TRIP_DELAY between two points. Specifically, theoutbound PHY_DELAY and return ARB_RESPONSE_DELAY measured between agiven ordered pair of ports on a PHY (say P_(c) out to and back fromP_(d)) can be related to the maximum outbound PHY_DELAY and returnARB_RESPONSE_DELAY between any and all ordered pairs of ports(referenced as P_(a)& P_(b)) on the same PHY:

$\begin{matrix}{0 \leq \left\lbrack \begin{matrix}{\frac{{PHY\_ DELAY}_{n,\max}^{P_{a}->P_{b}} + {{ARB\_ RESPONSE}{\_ DELAY}_{n,\max}^{P_{b}->P_{a}}}}{2} -} \\\frac{{PHY\_ DELAY}_{n,{meas}}^{P_{c}->P_{d}} + {{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}}^{P_{d}->P_{c}}}}{2}\end{matrix} \right\rbrack \leq {Jitter}_{n}} & (88)\end{matrix}$

Noting that a measured value can never exceed a maximum value betweenorder ports, the following corollary relating two independentmeasurements can be proven for any and all combination of ordered ports:

$\begin{matrix}{❘{\begin{matrix}{\frac{{PHY\_ DELAY}_{n,{meas}_{j}}^{P_{a}->P_{b\;}} + {{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{j}}^{P_{b}->P_{a}}}}{2} -} \\\frac{{PHY\_ DELAY}_{n,{meas}_{2}}^{P_{c}->P_{d}} + {{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{2}}^{P_{d}->P_{c}}}}{2}\end{matrix}❘{\leq {Jitter}_{n}}}} & (89)\end{matrix}$

In order for a bus manager to calculate ordered leaf-to-leaf delays viaa series of ping requests launched from the bus manager, a number ofROUND_TRIP_DELAY relationships will be required and are derived below.

Round_Trip_Delay_(max)^([P_(X)O P_(Y)])

Using the definition of Round_Trip_Delay first provided in equation (12)as guidance, the roundtrip delay between Nodes X and Y from theperspective of Node X can be written as:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} = {{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,\max}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,\max}^{P_{n}->P_{n}^{\prime}}} +}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{X}}}} & (90)\end{matrix}$

From equation (88), the maximum PHY_DELAY and ARB_RESPONSE_DELAY betweenan ordered pair of ports can be bounded by the measured delays plus theoverall jitter sum yielding:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} \leq {{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{j}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{j}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{X}}}} & (91)\end{matrix}$

Comparison to the definition of Round_Trip_Delay then allows

$\begin{matrix}{{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{{meas}_{j}}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} + {\sum\limits_{n = {X + 1}}^{Y - 1}\;{2 \cdot {Jitter}_{n}}}}}{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{X}}\rbrack}}} & (92)\end{matrix}$

Using the definition of Round_Trip_Delay first provided in equation (12)as guidance, the roundtrip delay between Nodes X and Y from theperspective of Node Y can be written as:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{X}}\rbrack}} = {{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,\max}^{P_{n}->P_{n}^{\prime}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,\max}^{P_{n}^{\prime}->P_{n}}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{X}}}} & (93)\end{matrix}$

From equation (88), the maximum PHY_DELAY and ARB_RESPONSE_DELAY betweenan ordered pair of ports can be related to the measured delays observedin the reverse direction:

$\begin{matrix}{\begin{pmatrix}{{PHY\_ DELAY}_{n,\max}^{P_{n}->P_{n}^{\prime}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,\max}^{P_{n}^{\prime}->P_{n}}}\end{pmatrix} \leq {{2 \cdot {Jitter}_{n}} + \begin{pmatrix}{{PHY\_ DELAY}_{n,{meas}_{j}}^{P_{n}^{\prime}->P_{n}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{j}}^{P_{n}->P_{n}^{\prime}}}\end{pmatrix}}} & (94)\end{matrix}$

allowing the maximum round trip between Nodes X and Y to be rewrittenas:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{X}}\rbrack}} \leq {{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{j}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{j}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{X}}}} & (95)\end{matrix}$

Comparison to the definition of Round_Trip_Delay then allows

$\begin{matrix}{{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{X}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{{meas}_{j}}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} + {\sum\limits_{n = {X + 1}}^{Y - 1}\;{2 \cdot {Jitter}_{n}}}}}{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{N}O\; P_{Y}}\rbrack}}} & (96)\end{matrix}$

Using the definition of Round_Trip_Delay first provided in equation (12)as guidance, the roundtrip delay between Nodes N and Y from theperspective of Node N can be written as:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{N}O\; P_{Y}}\rbrack}} = {{\sum\limits_{n = {N + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,\max}^{P_{n}^{\prime}->P_{n}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,\max}^{P_{n}->P_{n}^{\prime}}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{N}}}} & (97)\end{matrix}$

From equation (88), the maximum PHY_DELAY and ARB_RESPONSE_DELAY betweenan ordered pair of ports can be bounded by the measured delays plus theoverall jitter sum yielding:

$\begin{matrix}{{{Round}\mspace{14mu}{Trip\_ Delay}_{\max}^{\lbrack{P_{N}\; O\; P_{Y}}\rbrack}} \leq {{\sum\limits_{n = {N + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{N}}}} & (98)\end{matrix}$

Introducing offsetting terms to the right side:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{N}O\; P_{Y}}\rbrack}} \leq {{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{X}} - {\sum\limits_{n = {X + 1}}^{N - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} - {2 \cdot {cable\_ delay}_{X}} - {PHY\_ DELAY}_{N,{meas}_{1}}^{P_{N}^{\prime}->P_{N}} - {{ARB\_ RESPONSE}{\_ DELAY}_{N,{meas}_{1}}^{P_{N}->P_{N}^{\prime}}} - {2 \cdot {Jitter}_{N}}}} & (99)\end{matrix}$

Equations (89) and the fact that measured delays are at no smaller thanminimum delays allow simplification to:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{N}O\; P_{Y}}\rbrack}} \leq {{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{X}} - {\sum\limits_{n = {X + 1}}^{N - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{2}}^{P_{n}^{\prime}->P_{n}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{2}}^{P_{n}->P_{n}^{\prime}}}\end{pmatrix}} - {2 \cdot {cable\_ delay}_{X}} - {PHY\_ DELAY}_{N,\min}^{P_{N}^{\prime}->P_{N}} - {{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}->P_{N}^{\prime}}} - {2 \cdot {Jitter}_{N}}}} & (100)\end{matrix}$

Comparison to the definition of Round_Trip_Delay then allows

$\begin{matrix}{{{{{Round\_ Trip}{\_ Delay}_{\max}^{{\lbrack{P_{N}O\; P_{Y}}\rbrack}\;}} \leq {{{Round\_ Trip}{\_ Delay}_{{meas}_{1}}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} + {\sum\limits_{n = {X + 1}}^{Y - 1}\;{2 \cdot {Jitter}_{n}}} - {{Round\_ Trip}{\_ Delay}_{{meas}_{2}}^{\lbrack{P_{X}O\; P_{N}}\rbrack}} - {PHY\_ DELAY}_{N,\min}^{P_{N}^{\prime}->P_{N}} - {{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}->P_{N}^{\prime}}} - {2 \cdot {Jitter}_{N}}}}{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{N}}\rbrack}}}\mspace{11mu}} & (101)\end{matrix}$

Using the definition of Round_Trip_Delay first provided in equation (12)as guidance, the roundtrip delay between Nodes N and Y from theperspective of Node Y can be written as:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{N}}\rbrack}} = {{\sum\limits_{n = {N + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,\max}^{P_{n}->P_{n}^{\prime}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,\max}^{P_{n}^{\prime}->P_{n}}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{N}}}} & (102)\end{matrix}$

From equation (88), the maximum PHY_DELAY and ARB_RESPONSE_DELAY betweenan ordered pair of ports can be related to the measured delays observedin the reverse direction:

$\begin{matrix}{\begin{pmatrix}{{PHY\_ DELAY}_{n,\max}^{P_{n}->P_{n}^{\prime}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,\max}^{P_{n}^{\prime}->P_{n}}}\end{pmatrix} \leq {{2 \cdot {Jitter}_{n}} + \begin{pmatrix}{{PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}}\end{pmatrix}}} & (103)\end{matrix}$

allowing the maximum round trip between Nodes N and Y to be rewrittenas:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{N}}\rbrack}} \leq {{\sum\limits_{n = {N + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime\;}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{N}}}} & (104)\end{matrix}$

Introducing offsetting terms to the right side:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{N}}\rbrack}} \leq {{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n\;}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{X}} - {\sum\limits_{n = {X + 1}}^{N - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} - {2 \cdot {cable\_ delay}_{X}} - {PHY\_ DELAY}_{N,{meas}_{1}}^{P_{N}^{\prime}->P_{N}} - {{ARB\_ RESPONSE}{\_ DELAY}_{N,{meas}_{1}}^{P_{N}->P_{N}^{\prime}}} - {2 \cdot {Jitter}_{N}}}} & (105)\end{matrix}$

Equations (89) and the fact that measured delays are at no smaller thanminimum delays allow simplification to:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{N}}\rbrack}} \leq {{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{1}}^{P_{n}->P_{n}^{\prime}}} +} \\{2 \cdot {Jitter}_{n}}\end{pmatrix}} + {2 \cdot {cable\_ delay}_{X\;}} - {\sum\limits_{n = {X + 1}}^{N - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} + {PHY\_ DELAY}_{n,{meas}_{1}}^{P_{n}^{\prime}->P_{n}} +} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}_{2}}^{P_{n}->P_{n}}} +}\end{pmatrix}} - {2 \cdot {cable\_ delay}_{X}} - {PHY\_ DELAY}_{N,\min}^{P_{N}^{\prime}->P_{N}} - {{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}->P_{N}^{\prime}}} - {2 \cdot {Jitter}_{N\;}}}} & (106)\end{matrix}$

Comparison to the definition of Round_Trip_Delay then allows

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{N}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{{meas}_{1}}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} + {\sum\limits_{n = {X + 1}}^{Y - 1}\;{2 \cdot {Jitter}_{n}}} - {{Round\_ Trip}{\_ delay}_{{meas}_{2}}^{\lbrack{P_{X}O\; P_{N}}\rbrack}} - {PHY\_ DELAY}_{N,\min}^{P_{N}^{\prime\;}->P_{N}} - {{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}->P_{N}^{\prime}}} - {2 \cdot {Jitter}_{N}}}} & (107)\end{matrix}$

PHY pinging provides a low level mechanism to directly measure roundtrip delays between two nodes by timing link initiated subactions.However, pinging does introduce some uncertainty in the measured delay.Any gap count algorithm which employs PHY pinging must compensate forsuch uncertainty. FIG. 8 depicts a ping subaction issued by the link inNode X and directed to Node Y.

The timing reference points t₁ through t₇ are identical to those used inthe previous gap count derivations. Additionally:

t₁′ Coincident with the rising SCLK edge in which the PHY first samplesIDLE after a link transmission. t₁′ leads t₁ by LINK_TO_BUS_DELAY t₇′Coincident with the rising SCLK edge in which the PHY is driving thefirst RECEIVE indication to the link. (The PHY presumably drove RECEIVEoff of the previous clock transition.) t₇′ lags t₇ by BUS_TO_LINK_DELAY

The ping time measured by the link (in SCLK cycles) is then given by:

$\begin{matrix}\begin{matrix}{{Ping\_ Time}_{meas}^{\lbrack{P_{X}O\; P_{Y}}\rbrack} = {t_{7}^{\prime} - t_{1}^{\prime}}} \\{= {{{BUS\_ TO}{\_ LINK}{\_ DELAY}_{X,{meas}}} + t_{7} - t_{1} +}} \\{{LINK\_ TO}{\_ BUS}{\_ DELAY}_{X,{meas}}} \\{= {{{BUS\_ TO}{\_ LINK}{\_ DELAY}_{X,{meas}}} +}} \\{{{LINK\_ TO}{\_ BUS}{\_ DELAY}_{X,{meas}}} + t_{0} +} \\{{\sum\limits_{n = {X + 1}}^{Y - 1}\;\begin{pmatrix}{{2 \cdot {cable\_ delay}_{n}} +} \\{{PHY\_ DELAY}_{n,{meas}}^{P_{n}^{\prime}->P_{n}} +} \\{{ARB\_ RESPONSE}{\_ DELAY}_{n,{meas}}^{P_{n}^{\prime}->P_{n}^{\prime}}}\end{pmatrix}} +} \\{{2 \cdot {cable\_ delay}_{X}} + \frac{packet\_ length}{\begin{matrix}{{packet\_ speed} \cdot} \\{BASERATE}_{Y - 1}\end{matrix}} +} \\{{{DATA\_ END}{\_ TIME}_{{Y - 1},{meas}}^{P_{Y - 1}}} +} \\{{RESPONSE\_ TIME}_{Y,{meas}}^{P_{Y}^{\prime}} -} \\{t_{0} - \frac{packet\_ length}{{packet\_ speed} \cdot {BASERATE}_{X}}} \\{= {{{BUS\_ TO}{\_ LINK}{\_ DELAY}_{X,{meas}}} +}} \\{{{LINK\_ TO}{\_ BUS}{\_ DELAY}_{X,{meas}}} +} \\{{{Round\_ Trip}{\_ Delay}_{meas}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} +} \\{{PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} +} \\{{{DATA\_ END}{\_ TIME}_{{Y - 1},{meas}}^{P_{Y - 1}}} +} \\{{RESPONSE\_ TIME}_{Y,{meas}}^{P_{Y}^{\prime}}\;}\end{matrix} & (108)\end{matrix}$

Solving for the measured Round_Trip_Delay gives:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{meas}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} = {{Ping\_ Time}_{meas}^{\lbrack{P_{X}O\; P_{Y}}\rbrack} - {{BUS\_ TO}{\_ LINK}{\_ DELAY}_{X,{meas}}} - {{LINK\_ TO}{\_ BUS}{\_ DELAY}_{X,{meas}}} - {PPM\_ delta}^{\lbrack{{Y - 1},X}\rbrack} - {{DATA\_ END}{\_ TIME}_{{Y - 1},{meas}}^{P_{Y - 1}}} - {RESPONSE\_ TIME}_{Y,{meas}}^{P_{Y}^{\prime}}}} & (109)\end{matrix}$

Remembering that RESPONSE_TIME (min or max) absorbs PPM_delta, an upperand lower bound can be defined for Round_Trip_Delay:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} = {{Ping\_ Time}_{meas}^{\lbrack{P_{X}O\; P_{Y}}\rbrack} - {{BUS\_ TO}{\_ LINK}{\_ DELAY}_{X,\min}} - {{LINK\_ TO}{\_ BUS}{\_ DELAY}_{X,\min}} - {{DATA\_ END}{\_ TIME}_{{Y - 1},\min}^{P_{Y - 1}}} - {RESPONSE\_ TIME}_{Y,\min}^{P_{Y}^{\prime}}}} & (110) \\{{{and}\mspace{14mu}{Round\_ Trip}{\_ Delay}_{{Ping},\min}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} = {{Ping\_ Time}_{meas}^{\lbrack{P_{X}O\; P_{Y}}\rbrack} - {{BUS\_ TO}{\_ LINK}{\_ DELAY}_{X,\max}} - {{LINK\_ TO}{\_ BUS}{\_ DELAY}_{X,\max}} - {{DATA\_ END}{\_ TIME}_{{Y - 1},\max}^{P_{Y - 1}}} - {RESPONSE\_ TIME}_{Y,\max}^{P_{Y}^{\prime}}}} & (111)\end{matrix}$such that

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{{Ping},\min}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} \leq {{Round\_ Trip}{\_ Delay}_{meas}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} \leq {{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}}} & (112)\end{matrix}$

Using the Round_Trip_Delay properties and the Ping_Time relationships,the maximum Round_Trip_Delay between two given leaf nodes can be boundedfor any possible topology.

The simplest and most accurate Round_Trip_Delay determination isafforded when the Bus Manager is one of the leaf nodes in question asshown in FIG. 9.

From (92),

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{{meas}_{1}}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}}}} & (113)\end{matrix}$And from (112),

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}}}} & (114)\end{matrix}$Likewise, the reverse path is also bounded:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{BM}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}}}} & (115)\end{matrix}$

The second topology to consider is when the bus manager is not a leafbut is part of the connecting path between the two leaves as illustratedin FIG. 10.

Expressing the max delay piecewise,

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} = {{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{BM}}\rbrack}} + {{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack P_{BM}O\; P_{Y}\rbrack}} + {PHY\_ DELAY}_{{BM},\max}^{P_{BM}^{\prime}\rightarrow P_{BM}} + {{ARB\_ RESPONSE}{\_ DELAY}_{{BM},\max}^{P_{BM}\rightarrow P_{BM}^{\prime}}}}} & (116)\end{matrix}$

Equations (92) and (96) allow:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{meas}^{\lbrack{P_{BM}O\; P_{X}}\rbrack}} + {\sum\limits_{n}^{({{BM},X})}\;{2 \cdot {Jitter}_{n}}} + {{Round\_ Trip}{\_ Delay}_{meas}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}} + {PHY\_ DELAY}_{{BM},\max}^{P_{BM}^{\prime}->P_{BM}} + {{ARB\_ RESPONSE}{\_ DELAY}_{{BM},\max}^{P_{BM}->P_{BM}^{\prime}}}}} & (117)\end{matrix}$And from (112),

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{X}}\rbrack}} + {\sum\limits_{n}^{({{BM},X})}\;{2 \cdot {Jitter}_{n}}} + {{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}} + {PHY\_ DELAY}_{{BM},\max}^{P_{BM}^{\prime}->P_{BM}} + {{ARB\_ RESPONSE}{\_ DELAY}_{{BM},\max}^{P_{BM}->P_{BM}^{\prime}}}}} & (118)\end{matrix}$

Likewise, the reverse path is also bounded:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{Y}O\; P_{X}}\rbrack}} \leq {{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{X}}\rbrack}} + {\sum\limits_{n}^{({{BM},X})}\;{2 \cdot {Jitter}_{n}}} + {{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}} + {PHY\_ DELAY}_{{BM},\max}^{P_{BM}->P_{BM}^{\prime}} + {{ARB\_ RESPONSE}{\_ DELAY}_{{BM},\max}^{P_{BM}^{\prime}->P_{BM}}}}} & (119)\end{matrix}$

The final topology to consider is when the bus manager is not a leaf butis not part of the connecting path between the two leaves as illustratedin FIG. 11.

Expressing the max delay piecewise,

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} = {{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack P_{X}O\; P_{N}\rbrack}} + {{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{N}O\; P_{Y}}\rbrack}} + {PHY\_ DELAY}_{N,\max}^{P_{N}^{\prime}->P_{N}} + {{ARB\_ RESPONSE}{\_ DELAY}_{N,\max}^{P_{N}->P_{N}^{\prime}}}}} & (120)\end{matrix}$

Equations (107) and (101) allow:

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} \leq {\begin{pmatrix}{{{Round\_ Trip}{\_ Delay}_{{meas}_{1}}^{\lbrack{P_{BM}O\; P_{X}}\rbrack}} + {\sum\limits_{n}^{({{BM},X})}\;{2 \cdot {Jitter}_{n}}} -} \\{{{Round\_ Trip}{\_ Delay}_{{meas}_{2}}^{\lbrack{P_{BM}O\; P_{N}}\rbrack}} - {PHY\_ DELAY}_{N,\min}^{P_{N}^{BM}->P_{N}^{\prime}} -} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}^{\prime}->P_{N}^{BM}}} - {2 \cdot {Jitter}_{N}}}\end{pmatrix} + \begin{pmatrix}{{{Round\_ Trip}{\_ Delay}_{{meas}_{1}}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}} -} \\{{{Round\_ Trip}{\_ Delay}_{{meas}_{2}}^{\lbrack{P_{BM}O\; P_{N}}\rbrack}} - {PHY\_ DELAY}_{N,\min}^{P_{N}^{BM}->P_{N}} -} \\{{{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}->P_{N}^{BM}}} - {2 \cdot {Jitter}_{N}}}\end{pmatrix} + {PHY\_ DELAY}_{N,\max}^{P_{N}^{\prime}->P_{N}} + {{ARB\_ RESPONSE}{\_ DELAY}_{N,\max}^{P_{N}->P_{N}^{\prime}}}}} & (121)\end{matrix}$

And from (112),

$\begin{matrix}{{{Round\_ Trip}{\_ Delay}_{\max}^{\lbrack{P_{X}O\; P_{Y}}\rbrack}} \leq {\begin{pmatrix}{{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{X}}\rbrack}} + {\sum\limits_{n}^{({{BM},X})}\;{2 \cdot {Jitter}_{n}}} +} \\{{{Round\_ Trip}{\_ Delay}_{{Ping},\max}^{\lbrack{P_{BM}O\; P_{Y}}\rbrack}} + {\sum\limits_{n}^{({{BM},Y})}\;{2 \cdot {Jitter}_{n}}} +} \\{{PHY\_ DELAY}_{N,\max}^{P_{N}^{\prime}->P_{N}} + {{ARB\_ RESPONSE}{\_ DELAY}_{N,\max}^{P_{N}->P_{N}^{\prime}}}}\end{pmatrix} - \begin{pmatrix}{{{2 \cdot {Round\_ Trip}}{\_ Delay}_{{Ping},\min}^{\lbrack{P_{BM}O\; P_{N}}\rbrack}} + {4 \cdot {Jitter}_{N}} +} \\{{PHY\_ DELAY}_{N,\min}^{P_{N}^{BM}->P_{N}^{\prime}} + {{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}^{\prime}->P_{N}^{{BM}\;}}} +} \\{{PHY\_ DELAY}_{N,\min}^{P_{N}^{BM}->P_{N}} + {{ARB\_ RESPONSE}{\_ DELAY}_{N,\min}^{P_{N}->P_{N}^{BM}}}}\end{pmatrix}}} & (122)\end{matrix}$ARB_RESPONSE_DELAY is a difficult parameter to characterize. Proper PHYoperation requires that arb signals propagate at least as fast as thedata bits, otherwise the arbitration indications could shorten as theyare repeated through a network. This fact places a bound on the maximumARB_RESPONSE_DELAY: ARB_RESPONSE_DELAY between two ports at a particularinstant must always be less than or equal to the data repeat delay atthe very same instant. Although the distinction is subtle, this is notthe same as saying the maximum ARB_RESPONSE_DELAY is PHY_DELAY.(PHY_DELAY only applies to the first bit of a packet and is known tohave some jitter from one repeat operation to the next. Consequently,requiring ARB_RESPONSE_DELAY<=PHY_DELAY doesn't force ARB_RESPONSE_DELAYto track the instantaneous PHY_DELAY nor does it allowARB_RESPONSE_DELAY to track the data repeat time for the last bit of apacket which may actually exceed PHY_DELAY due to PPM drift.) Finally,the table approach to calculating gap_counta and gap_countb rely onARB_RESPONSE_DELAY always being bounded by the maximum PHY_DELAY whendetermining the Round_Trip_Delay.

The minimum ARB_RESPONSE_DELAY is only of significance when calculatingData_Arb_Mismatch as required by gap_countc and gap_countd. Ideally,Data_Arb_Mismatch should be a constant regardless of PHY_DELAY so thatneither gap_countc nor gap_countd will begin to dominate the gap_countsetting as PHY_DELAY increases. Consequently, the minimumARB_RESPONSE_DELAY should track the instantaneous PHY_DELAY with someoffset for margin. Simply specifying the min value as a function ofPHY_DELAY is ambiguous, however, since PHY_DELAY can be easily confusedwith the max DELAY reported in the register map. (For example, withDELAY at 144 ns, it would be easy to assume a min of PHY_DELAY −60 nswould be equivalent to 84 ns. But if the worst case first bit repeatdelay was only 100 ns, arb signals repeating with a delay of 40 ns oughtto be considered within spec even though the delay is <84 ns.)

Consequently, specifying an upper and a lower bound forARB_RESPONSE_DELAY is best done in the standard with words rather thanvalues. The minimum and maximum values for ARB_RESPONSE_DELAY includethat between all ordered pairs of ports, the PHY shall repeatarbitration line states at least as fast as clocked data, but not morethan 60 ns faster than clocked data.

A better approach is to replace ARB_RESPONSE_DELAY with the parameterDELAY_MISMATCH which is defined in the comment column as “Between allordered pairs of ports, the instantaneous repeat delay for data less theinstantaneous repeat delay for arbitration line states.” Then, theminimum would be given as 0 ns and the maximum would be 60 ns.

For a table based calculation of Round_Trip_Delay, either approach aboveallows the use of PHY_DELAY(max) for ARB_RESPONSE_DELAY. SinceRound_Trip_Delay considers the arbitration repeat delay in the directionopposite to the original packet flow, the return arbitration indicationof interest is known to arrive at the receive port when the PHY is idle(all caught up with nothing to repeat). At that point, the instantaneousPHY_DELAY is the same as the first data bit repeat delay which isbounded by PHY_DELAY(max). Since ARB_RESPONSE_DELAY is always bounded bythe instantaneous PHY_DELAY, it to is bounded by PHY_DELAY(max) at thepoint the arbitration indication first arrives.

The minimum bound on PHY_DELAY is used by the bus manager whendetermining the round_trip_delay between leaf nodes that are notseparated by the bus manager. The more precise the minimum bound, themore accurate the pinging calculation can be. Ideally then, the boundmay want to scale with increasing PHY_DELAY. Alternatively, the lowerbound could be calculated by examining the Delay field in the registermap: if zero, the lower bound is assumed to be the fixed value specified(60 ns currently). If non-zero, the lower bound could then be determinedby subtracting the jitter field (converted to ns) from the delay field(converted to ns).

The “Jitter” field was introduced to aid in selection of gap_count viapinging by describing the uncertainty found in any empirical measurementof Round_Trip_Delay. Since Round_Trip_Delay encompasses an “outbound”PHY_DELAY and a “return” ARB_RESPONSE_DELAY, the jitter term shouldcapture uncertainty in both. The needs of pinging can be met with thefollowing description for jitter: Upper bound of the mean average of theworst case data repeat jitter (max/min variance) and the worst casearbitration repeat jitter (max/min variance), expressed as2*(jitter+1)/BASE_RATE.

Note that from the discussion on minimum PHY_DELAY, it may be desirableto require that if the delay field is non-zero, then the slowest firstdata bit repeat delay can be calculated by subtracting the jitter valuefrom the delay value.

1. A device for use in a first node of a serial bus, the devicecomprising: a first module adapted to ping a second node; a secondmodule adapted to receive a ping response from the second node; a thirdmodule adapted to calculate a maximum round trip delay between a firstPHY associated with the first node and a second PHY associated with thesecond node based at least in part upon a jitter value, and furtherbased at least in part on the ping response sent to the second module;and a fourth module adapted to send a configuration packet to all PHYson the serial bus, the configuration packet containing a gap count, thegap count derived from the maximum round trip delay between the firstPHY and the second PHY; wherein at least one of said first PHY andsecond PHY comprises a first pair of ports and a second pair of portsand the jitter value is defined as being greater than or equal to theabsolute value of a total quantity, the total quantity defined as thedifference between a first quantity and a second quantity; and whereinthe first quantity comprises the sum of a first sub-quantity and asecond sub-quantity, the first sub-quantity consisting of a PHY delaybetween the first ordered pair of ports divided by two, the secondsub-quantity consisting of an arbitration response delay between thefirst ordered pair of ports divided by two.
 2. The device of claim 1,wherein the second quantity comprises the sum of a third subquantity anda fourth subquantity, the third subquantity consisting of a PHY delaybetween the second ordered pair of ports divided by two, and the fourthsubquantity consisting of an arbitration response delay between thesecond ordered pair of ports divided by two.
 3. The device of claim 1,wherein the response comprises a self-identification packet.
 4. Thedevice of claim 1, wherein all PHYs of the high-speed serial buscomprise a subaction gap detection time that is greater than a maximumidle value that can occur within a subaction.
 5. The device of claim 1,wherein all PHYs of the high-speed serial bus comprise an arbitrationreset gap timeout value that is greater than the largest subaction gapthat can occur over the high-speed serial bus.
 6. A method of optimizingcommunication over a high-speed serial bus by minimizing the delaybetween packets transmitted over the bus, the method comprising: sendinga ping from a first node to a second node; sending a response from thesecond node to the first node after receiving the ping; calculating amaximum round trip delay between a first PHY of the first node and asecond PHY of the second node based at least in part upon a jitter, andfurther based at least in part upon the response sent to the first node;sending via a bus manager a configuration packet to all PHYs connectedon the bus, the configuration packet containing a minimum gap_countparameter value, the minimum gap_count parameter value derived from themaximum round trip delay between the first PHY and the second PHY; andsending via all PHYs connected on the packets over the bus, using theminimum gap_count parameter value as a delay between packets; wherein atleast one of said first PHY and second PHY comprises a first pair ofports and a second pair of ports, wherein the jitter is defined as beinggreater than or equal to the absolute value of a total quantity, thetotal quantity defined as the difference between a first quantity and asecond quantity; and wherein the first quantity comprises the sum of afirst subquantity and a second subquantity, the first subquantityconsisting of a PHY delay between the first ordered pair of portsdivided by two, the second subquantity consisting of an arbitrationresponse delay between the first ordered pair of ports divided by two.7. The method of claim 6, wherein the second quantity comprises the sumof a third subquantity and a fourth subquantity, the third subquantityconsisting of a PHY delay between the second ordered pair of portsdivided by two, and the fourth subquantity consisting of an arbitrationresponse delay between the second ordered pair of ports divided by two.8. The method of claim 6, further comprising preserving an ack/iso gapbetween packets, wherein a first PHY sent a most recently-sent packetand a second PHY is responding to the first PHY.
 9. The method of claim8, wherein the second PHY is adapted to respond with an ack packet. 10.The method of claim 8, wherein the second PHY is adapted to respond withan isochronous arbitration packet.
 11. The method of claim 6, whereinthe first PHY sends an isochronous packet, observes a sub action gap,and initiates an arbitration indication.
 12. The method of claim 6,wherein the first PHY sends an asynchronous packet, observes anarbitration reset gap, and initiates an arbitration indication.
 13. Themethod of claim 6, wherein calculating the round trip delay comprisesexecuting a ping command at a link layer on said first node directed ata link layer on said second node.
 14. The method of claim 13, whereincalculating the round trip delay comprises calculating a round tripdelay from a first link on the first node and a second link on thesecond node.
 15. The method of claim 6, wherein the second PHY has asubaction gap timeout value that is greater than an IDLE value that canoccur within a subaction and an isochronous interval on the high-speedserial bus.
 16. The method of claim 6, wherein all PHYs of thehigh-speed serial bus comprise a subaction gap detection time that isgreater than a maximum idle value that can occur within a subaction. 17.The method of claim 6, wherein all PHYs of the high-speed serial buscomprise an arbitration reset gap timeout value that is greater than thelargest subaction gap that can occur over the high-speed serial bus. 18.The method of claim 6, wherein the response comprises a self-ID packet.19. A computer-readable medium containing instructions which, whenexecuted by a processor, minimize the delay between packets transmittedover a high-speed serial bus, by performing the method comprising:sending a ping from a first node to a second node; sending a responsefrom the second node to the first node after receiving the ping;calculating a maximum round trip delay between a first PHY of the firstnode and a second PHY of the second node based at least in part upon ajitter, and further based at least in part upon the response sent to thefirst node; sending via a bus manager a configuration packet to all PHYsconnected on the bus, the configuration packet containing a minimumgap_count parameter value, the minimum gap_count parameter value derivedfrom the maximum round trip delay between the first PHY and the secondPHY; and sending via all PHYs connected on the packets over the bussusing the minimum gap_count parameter value as a delay between packets;wherein at least one of said first PHY and second PHY comprises a firstpair of ports and a second pair of ports, wherein the jitter is definedas being greater than or equal to the absolute value of a totalquantity, the total quantity defined as the difference between a firstquantity and a second quantity; and wherein the first quantity comprisesthe sum of a first subquantity and a second subquantity, the firstsubquantity consisting of a PHY delay between the first ordered pair ofports divided by two, the second subquantity consisting of anarbitration response delay between the first ordered pair of portsdivided by two.
 20. The method of claim 19, wherein the second quantitycomprises the sum of a third subquantity and a fourth subquantity, thethird subquantity consisting of a PHY delay between the second orderedpair of ports divided by two, and the fourth subquantity consisting ofan arbitration response delay between the second ordered pair of portsdivided by two.
 21. The method of claim 19, further comprisingpreserving an ack/iso gap between packets, wherein a first PHY sent amost recently-sent packet and a second PHY is responding to the firstPHY.
 22. The method of claim 21, wherein the second PHY is adapted torespond with an ack packet.
 23. The method of claim 21, wherein thesecond PHY is adapted to respond with an isochronous arbitration packet.24. The method of claim 19, wherein the first PHY sends an isochronouspacket, observes a sub action gap, and initiates an arbitrationindication.
 25. The method of claim 19, wherein the first PHY sends anasynchronous packet, observes an arbitration reset gap, and initiates anarbitration indication.
 26. The method of claim 19, wherein calculatingthe round trip delay comprises executing a ping command at a link layeron said first node directed at a link layer on said second node.
 27. Themethod of claim 26, wherein calculating the round trip delay comprisescalculating a round trip delay from a first link on the first node and asecond link on the second node.
 28. The method of claim 19, wherein thesecond PHY has a subaction gap timeout value that is greater than anIDLE value that can occur within a subaction and an isochronous intervalon the high-speed serial bus.
 29. The method of claim 19, wherein allPHYs of the high-speed serial bus comprise a subaction gap detectiontime that is greater than a maximum idle value that can occur within asubaction.
 30. The method of claim 19, wherein all PHYs of thehigh-speed serial bus comprise an arbitration reset gap timeout valuethat is greater than the largest subaction gap that can occur over thehigh-speed serial bus.
 31. The method of claim 19, wherein the responsecomprises a self-ID packet.
 32. A device for use in a first node of aserial bus, the device comprising: means for pinging a second node;means for receiving a ping response from the second node; means forcalculating a maximum round trip delay between a first PHY associatedwith the first node and a second PHY associated with the second nodebased at least in part upon a jitter value, and further based at leastin part on the ping response sent to the second module; and means forsending a configuration packet to all PHYs on the serial bus, theconfiguration packet containing a gap count, the gap count derived fromthe maximum round trip delay between the first PHY and the second PHY;wherein at least one of said first PHY and second PHY comprises a firstpair of ports and a second pair of ports and the jitter value is definedas being greater than or equal to the absolute value of a totalquantity, the total quantity defined as the difference between a firstquantity and a second quantity; and wherein the first quantity comprisesthe sum of a first sub-quantity and a second sub-quantity, the firstsub-quantity consisting of a PHY delay between the first ordered pair ofports divided by two, the second sub-quantity consisting of anarbitration response delay between the first ordered pair of portsdivided by two.
 33. A device for use in a first node of a serial bus,the device comprising: a first module adapted to send a first signal toa second node, said first signal adapted to elicit a response from saidsecond node; a second module adapted to calculate a maximum round tripdelay between the first node and the second node based at least in partupon a jitter value, and further based at least in part on the responseelicited from the second node; and a third module adapted to send apacket to all nodes on the serial bus, the packet containing a gapcount, the gap count derived from the maximum round trip delay betweenthe first node and the second node; wherein at least one of said firstnode and said second node comprises a first pair of ports and the jittervalue is defined as being greater than or equal to the absolute value ofa total quantity, the total quantity defined as the difference between afirst quantity and a second quantity; and wherein the first quantitycomprises the sum of a first sub-quantity and a second sub-quantity, thefirst sub-quantity consisting of a delay between the first pair of portsdivided by two, the second sub-quantity consisting of an arbitrationresponse delay between the first pair of ports divided by two.
 34. Thedevice of claim 33, wherein at least one of said first node and saidsecond node further comprises a second pair of ports, wherein the secondquantity comprises the sum of a third subquantity and a fourthsubquantity, the third subquantity consisting of a delay between thesecond pair of ports divided by two, and the fourth subquantityconsisting of an arbitration response delay between the second pair ofports divided by two.
 35. The device of claim 33, wherein the responsecomprises a self-identification packet.
 36. A method of optimizingcommunication over a serial bus, the method comprising: sending a firstmessage from a first node to a second node; sending a response from thesecond node to the first node after receiving the first message;calculating a maximum round trip delay between the first node and thesecond node based at least in part upon a jitter, and further based atleast in part upon the response sent to the first node; sending a packetto all nodes connected on the bus, the packet containing a minimum gapcount parameter value derived from the maximum round trip delay betweenthe first node and the second node; and sending via all nodes connectedon the bus the minimum gap count parameter value as a delay betweenpackets; wherein at least one of said first node and second nodecomprises a first pair of ports, and wherein the jitter is defined asbeing greater than or equal to the absolute value of the differencebetween a first quantity and a second quantity; and wherein the firstquantity comprises the sum of a first subquantity and a secondsubquantity, the first subquantity comprising a PHY delay related to thefirst pair of ports, the second subquantity comprising an arbitrationresponse delay related to the first pair of ports.
 37. The method ofclaim 36, wherein at least one of said first node and said second nodefurther comprises a second pair of ports, wherein the second quantitycomprises the sum of a third subquantity and a fourth subquantity, thethird subquantity comprising a PHY delay related to the second pair ofports, and the fourth subquantity comprising an arbitration responsedelay related to the second pair of ports.
 38. The method of claim 36,wherein calculating the round trip delay comprises executing a pingcommand at a link layer on said first node directed at a link layer onsaid second node.
 39. The method of claim 38, wherein calculating theround trip delay comprises calculating a round trip delay from a firstlink on the first node and a second link on the second node.
 40. Themethod of claim 36, wherein the second node has a subaction gap timeoutvalue that is greater than an idle value that can occur within asubaction and an isochronous interval on the serial bus.
 41. The methodof claim 36, wherein all nodes of the serial bus comprise a subactiongap detection time that is greater than a maximum idle value that canoccur within a subaction.
 42. The method of claim 36, wherein all nodesof the high-speed serial bus comprise an arbitration reset gap timeoutvalue that is greater than the largest subaction gap that can occur overthe serial bus.
 43. The method of claim 36, wherein the responsecomprises a self-identification packet.